784( $ti,omap3-zoom3ti,omap36xxti,omap3 + 7TI Zoom3chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+8pinmux_mmc1_pins0Uipinmux_mmc2_pinsPU(*,.02468:pinmux_mmc3_pinsUhipinmux_uart1_pins UPNRALipinmux_uart2_pins UDFJHipinmux_uart3_pins Ujlnpipinmux_wl12xx_gpioUiscm_conf@270sysconsimple-busp0+ p0ipbias_regulator@2b0ti,pbias-omap3ti,pbias-omapqpbias_mmc_omap2430xpbias_mmc_omap2430w@-iclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhimcbsp5_fckti,composite-clockimcbsp1_mux_fck@4ti,composite-mux-clocki mcbsp1_fckti,composite-clock imcbsp2_mux_fck@4ti,composite-mux-clock i mcbsp2_fckti,composite-clock imcbsp3_mux_fck@68ti,composite-mux-clock himcbsp3_fckti,composite-clockimcbsp4_mux_fck@68ti,composite-mux-clock himcbsp4_fckti,composite-clockiclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+8pinmux_wlan_host_wkup_pinsUaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYiosc_sys_ck@d40 ti,mux-clock @isys_ck@1270ti,divider-clockpisys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockidpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clockiwkup_l4_ickfixed-factor-clockiNcorex2_d3_fckfixed-factor-clockicorex2_d5_fckfixed-factor-clockiclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clocki@virt_12m_ck fixed-clockivirt_13m_ck fixed-clock]@ivirt_19200000_ck fixed-clock$ivirt_26000000_ck fixed-clockivirt_38_4m_ck fixed-clockIidpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0idpll4_m2_ck@d48ti,divider-clock? Hi dpll4_m2x2_mul_ckfixed-factor-clock i!dpll4_m2x2_ck@d00ti,hsdiv-gate-clock! 'i"omap_96m_alwon_fckfixed-factor-clock"i)dpll3_ck@d00ti,omap3-dpll-core-clock @ 0idpll3_m3_ck@1140ti,divider-clock@i#dpll3_m3x2_mul_ckfixed-factor-clock#i$dpll3_m3x2_ck@d00ti,hsdiv-gate-clock$  'i%emu_core_alwon_ckfixed-factor-clock%ibsys_altclk fixed-clocki.mcbsp_clks fixed-clockidpll3_m2_ck@d40ti,divider-clock @icore_ckfixed-factor-clocki&dpll1_fck@940ti,divider-clock& @i'dpll1_ck@904ti,omap3-dpll-clock'  $ @ 4idpll1_x2_ckfixed-factor-clocki(dpll1_x2m2_ck@944ti,divider-clock( Di<cm_96m_fckfixed-factor-clock)i*omap_96m_fck@d40 ti,mux-clock* @iEdpll4_m3_ck@e40ti,divider-clock @i+dpll4_m3x2_mul_ckfixed-factor-clock+i,dpll4_m3x2_ck@d00ti,hsdiv-gate-clock, 'i-omap_54m_fck@d40 ti,mux-clock-. @i8cm_96m_d2_fckfixed-factor-clock*i/omap_48m_fck@d40 ti,mux-clock/. @i0omap_12m_fckfixed-factor-clock0iGdpll4_m4_ck@e40ti,divider-clock @i1dpll4_m4x2_mul_ckti,fixed-factor-clock1=KXi2dpll4_m4x2_ck@d00ti,gate-clock2 'Xidpll4_m5_ck@f40ti,divider-clock?@i3dpll4_m5x2_mul_ckti,fixed-factor-clock3=KXi4dpll4_m5x2_ck@d00ti,hsdiv-gate-clock4 'Xijdpll4_m6_ck@1140ti,divider-clock?@i5dpll4_m6x2_mul_ckfixed-factor-clock5i6dpll4_m6x2_ck@d00ti,hsdiv-gate-clock6 'i7emu_per_alwon_ckfixed-factor-clock7icclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock& pi9clkout2_src_mux_ck@d70ti,composite-mux-clock&*8 pi:clkout2_src_ckti,composite-clock9:i;sys_clkout2@d70ti,divider-clock;@ pkmpu_ckfixed-factor-clock<i=arm_fck@924ti,divider-clock= $emu_mpu_alwon_ckfixed-factor-clock=idl3_ick@a40ti,divider-clock& @i>l4_ick@a40ti,divider-clock> @i?rm_ick@c40ti,divider-clock? @gpt10_gate_fck@a00ti,composite-gate-clock  iAgpt10_mux_fck@a40ti,composite-mux-clock@ @iBgpt10_fckti,composite-clockABgpt11_gate_fck@a00ti,composite-gate-clock  iCgpt11_mux_fck@a40ti,composite-mux-clock@ @iDgpt11_fckti,composite-clockCDcore_96m_fckfixed-factor-clockEimmchs2_fck@a00ti,wait-gate-clock immchs1_fck@a00ti,wait-gate-clock ii2c3_fck@a00ti,wait-gate-clock ii2c2_fck@a00ti,wait-gate-clock ii2c1_fck@a00ti,wait-gate-clock imcbsp5_gate_fck@a00ti,composite-gate-clock  imcbsp1_gate_fck@a00ti,composite-gate-clock  i core_48m_fckfixed-factor-clock0iFmcspi4_fck@a00ti,wait-gate-clockF imcspi3_fck@a00ti,wait-gate-clockF imcspi2_fck@a00ti,wait-gate-clockF imcspi1_fck@a00ti,wait-gate-clockF iuart2_fck@a00ti,wait-gate-clockF iuart1_fck@a00ti,wait-gate-clockF  icore_12m_fckfixed-factor-clockGiHhdq_fck@a00ti,wait-gate-clockH icore_l3_ickfixed-factor-clock>iIsdrc_ick@a10ti,wait-gate-clockI igpmc_fckfixed-factor-clockIcore_l4_ickfixed-factor-clock?iJmmchs2_ick@a10ti,omap3-interface-clockJ immchs1_ick@a10ti,omap3-interface-clockJ ihdq_ick@a10ti,omap3-interface-clockJ imcspi4_ick@a10ti,omap3-interface-clockJ imcspi3_ick@a10ti,omap3-interface-clockJ imcspi2_ick@a10ti,omap3-interface-clockJ imcspi1_ick@a10ti,omap3-interface-clockJ ii2c3_ick@a10ti,omap3-interface-clockJ ii2c2_ick@a10ti,omap3-interface-clockJ ii2c1_ick@a10ti,omap3-interface-clockJ iuart2_ick@a10ti,omap3-interface-clockJ iuart1_ick@a10ti,omap3-interface-clockJ  igpt11_ick@a10ti,omap3-interface-clockJ  igpt10_ick@a10ti,omap3-interface-clockJ  imcbsp5_ick@a10ti,omap3-interface-clockJ  imcbsp1_ick@a10ti,omap3-interface-clockJ  iomapctrl_ick@a10ti,omap3-interface-clockJ idss_tv_fck@e00ti,gate-clock8idss_96m_fck@e00ti,gate-clockEidss2_alwon_fck@e00ti,gate-clockidummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock iKgpt1_mux_fck@c40ti,composite-mux-clock@ @iLgpt1_fckti,composite-clockKLaes2_ick@a10ti,omap3-interface-clockJ iwkup_32k_fckfixed-factor-clock@iMgpio1_dbck@c00ti,gate-clockM isha12_ick@a10ti,omap3-interface-clockJ iwdt2_fck@c00ti,wait-gate-clockM iwdt2_ick@c10ti,omap3-interface-clockN iwdt1_ick@c10ti,omap3-interface-clockN igpio1_ick@c10ti,omap3-interface-clockN iomap_32ksync_ick@c10ti,omap3-interface-clockN igpt12_ick@c10ti,omap3-interface-clockN igpt1_ick@c10ti,omap3-interface-clockN iper_96m_fckfixed-factor-clock)i per_48m_fckfixed-factor-clock0iOuart3_fck@1000ti,wait-gate-clockO igpt2_gate_fck@1000ti,composite-gate-clockiPgpt2_mux_fck@1040ti,composite-mux-clock@@iQgpt2_fckti,composite-clockPQgpt3_gate_fck@1000ti,composite-gate-clockiRgpt3_mux_fck@1040ti,composite-mux-clock@@iSgpt3_fckti,composite-clockRSgpt4_gate_fck@1000ti,composite-gate-clockiTgpt4_mux_fck@1040ti,composite-mux-clock@@iUgpt4_fckti,composite-clockTUgpt5_gate_fck@1000ti,composite-gate-clockiVgpt5_mux_fck@1040ti,composite-mux-clock@@iWgpt5_fckti,composite-clockVWgpt6_gate_fck@1000ti,composite-gate-clockiXgpt6_mux_fck@1040ti,composite-mux-clock@@iYgpt6_fckti,composite-clockXYgpt7_gate_fck@1000ti,composite-gate-clockiZgpt7_mux_fck@1040ti,composite-mux-clock@@i[gpt7_fckti,composite-clockZ[gpt8_gate_fck@1000ti,composite-gate-clock i\gpt8_mux_fck@1040ti,composite-mux-clock@@i]gpt8_fckti,composite-clock\]gpt9_gate_fck@1000ti,composite-gate-clock i^gpt9_mux_fck@1040ti,composite-mux-clock@@i_gpt9_fckti,composite-clock^_per_32k_alwon_fckfixed-factor-clock@i`gpio6_dbck@1000ti,gate-clock`igpio5_dbck@1000ti,gate-clock`igpio4_dbck@1000ti,gate-clock`igpio3_dbck@1000ti,gate-clock`igpio2_dbck@1000ti,gate-clock` iwdt3_fck@1000ti,wait-gate-clock` iper_l4_ickfixed-factor-clock?iagpio6_ick@1010ti,omap3-interface-clockaigpio5_ick@1010ti,omap3-interface-clockaigpio4_ick@1010ti,omap3-interface-clockaigpio3_ick@1010ti,omap3-interface-clockaigpio2_ick@1010ti,omap3-interface-clocka iwdt3_ick@1010ti,omap3-interface-clocka iuart3_ick@1010ti,omap3-interface-clocka iuart4_ick@1010ti,omap3-interface-clockaigpt9_ick@1010ti,omap3-interface-clocka igpt8_ick@1010ti,omap3-interface-clocka igpt7_ick@1010ti,omap3-interface-clockaigpt6_ick@1010ti,omap3-interface-clockaigpt5_ick@1010ti,omap3-interface-clockaigpt4_ick@1010ti,omap3-interface-clockaigpt3_ick@1010ti,omap3-interface-clockaigpt2_ick@1010ti,omap3-interface-clockaimcbsp2_ick@1010ti,omap3-interface-clockaimcbsp3_ick@1010ti,omap3-interface-clockaimcbsp4_ick@1010ti,omap3-interface-clockaimcbsp2_gate_fck@1000ti,composite-gate-clocki mcbsp3_gate_fck@1000ti,composite-gate-clockimcbsp4_gate_fck@1000ti,composite-gate-clockiemu_src_mux_ck@1140 ti,mux-clockbcd@ieemu_src_ckti,clkdm-gate-clockeifpclk_fck@1140ti,divider-clockf@pclkx2_fck@1140ti,divider-clockf@atclk_fck@1140ti,divider-clockf@traceclk_src_fck@1140 ti,mux-clockbcd@igtraceclk_fck@1140ti,divider-clockg @secure_32k_fck fixed-clockihgpt12_fckfixed-factor-clockhwdt1_fckfixed-factor-clockhsecurity_l4_ick2fixed-factor-clock?iiaes1_ick@a14ti,omap3-interface-clocki rng_ick@a14ti,omap3-interface-clocki sha11_ick@a14ti,omap3-interface-clocki des1_ick@a14ti,omap3-interface-clocki cam_mclk@f00ti,gate-clockjXcam_ick@f10!ti,omap3-no-wait-interface-clock?icsi2_96m_fck@f00ti,gate-clockisecurity_l3_ickfixed-factor-clock>ikpka_ick@a14ti,omap3-interface-clockk icr_ick@a10ti,omap3-interface-clockJ des2_ick@a10ti,omap3-interface-clockJ mspro_ick@a10ti,omap3-interface-clockJ mailboxes_ick@a10ti,omap3-interface-clockJ ssi_l4_ickfixed-factor-clock?irsr1_fck@c00ti,wait-gate-clock isr2_fck@c00ti,wait-gate-clock isr_l4_ickfixed-factor-clock?dpll2_fck@40ti,divider-clock&@ildpll2_ck@4ti,omap3-dpll-clockl$@4imdpll2_m2_ck@44ti,divider-clockmDiniva2_ck@0ti,wait-gate-clocknimodem_fck@a00ti,omap3-interface-clock isad2d_ick@a10ti,omap3-interface-clock> imad2d_ick@a18ti,omap3-interface-clock> imspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock iossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$ipssi_ssr_fck_3430es2ti,composite-clockopiqssi_sst_fck_3430es2fixed-factor-clockqihsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockI issi_ick_3430es2@a10ti,omap3-ssi-interface-clockr iusim_gate_fck@c00ti,composite-gate-clockE  i}sys_d2_ckfixed-factor-clockitomap_96m_d2_fckfixed-factor-clockEiuomap_96m_d4_fckfixed-factor-clockEivomap_96m_d8_fckfixed-factor-clockEiwomap_96m_d10_fckfixed-factor-clockE ixdpll5_m2_d4_ckfixed-factor-clocksiydpll5_m2_d8_ckfixed-factor-clocksizdpll5_m2_d16_ckfixed-factor-clocksi{dpll5_m2_d20_ckfixed-factor-clocksi|usim_mux_fck@c40ti,composite-mux-clock(tuvwxyz{| @i~usim_fckti,composite-clock}~usim_ick@c10ti,omap3-interface-clockN  idpll5_ck@d04ti,omap3-dpll-clock  $ L 4idpll5_m2_ck@d50ti,divider-clock Pissgx_gate_fck@b00ti,composite-gate-clock& icore_d3_ckfixed-factor-clock&icore_d4_ckfixed-factor-clock&icore_d6_ckfixed-factor-clock&iomap_192m_alwon_fckfixed-factor-clock"icore_d2_ckfixed-factor-clock&isgx_mux_fck@b40ti,composite-mux-clock * @isgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock> icpefuse_fck@a08ti,gate-clock its_fck@a08ti,gate-clock@ iusbtll_fck@a08ti,wait-gate-clocks iusbtll_ick@a18ti,omap3-interface-clockJ immchs3_ick@a10ti,omap3-interface-clockJ immchs3_fck@a00ti,wait-gate-clock idss1_alwon_fck_3430es2@e00ti,dss-gate-clockXidss_ick_3430es2@e10ti,omap3-dss-interface-clock?iusbhost_120m_fck@1400ti,gate-clocksiusbhost_48m_fck@1400ti,dss-gate-clock0iusbhost_ick@1410ti,omap3-dss-interface-clock?iuart4_fck@1000ti,wait-gate-clockOiclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainfdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainmd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH idma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmaigpio@48310000ti,omap3-gpioH1gpio1gpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4igpio@49056000ti,omap3-gpioI`!gpio5igpio@49058000ti,omap3-gpioI"gpio6iserial@4806a000ti,omap3-uartH H12txrxuart1l"default0serial@4806c000ti,omap3-uartHI34txrxuart2l"default0serial@49020000ti,omap3-uartIJ56txrxuart3l"default0i2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H  ti,twl4030rtcti,twl4030-rtc bciti,twl4030-bci :H Tvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' iregulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0iregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5iregulator-vusb1v8ti,twl4030-vusb1v8iregulator-vusb3v1ti,twl4030-vusb3v1iregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-igpioti,twl4030-gpioetwl4030-usbti,twl4030-usb qipwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madcii2c@48072000 ti,omap3-i2cH 9txrx+i2c2i2c@48060000 ti,omap3-i2cH=txrx+i2c3tvp5146@5c ti,tvp5146m2\mailbox@48094000ti,omap3-mailboxmailboxH @ dsp  *spi@48098000ti,omap2-mcspiH A+mcspi15@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi25 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi35 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi45FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1C=>txrxP]iv"default0mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx]v"default0+wlcore@2 ti,wl1271 mmu@480bd400ti,omap2-iommuH mmu_ispimmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5"timer@4903a000ti,omap3430-timerI*timer6"timer@4903c000ti,omap3430-timerI+timer7"timer@4903e000ti,omap3430-timerI,timer8/"timer@49040000ti,omap3430-timerI-timer9/timer@48086000ti,omap3430-timerH`.timer10/timer@48088000ti,omap3430-timerH/timer11/timer@48304000ti,omap3430-timerH0@_timer12<usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtxdp+ ,ethernet@gpmcsmsc,lan9221smsc,lan9115'(:-HW-etxKK7IYgt  uart@3,0 ns16550a g  ('(:-HW-et-7uart@3,1 ns16550a g  uart@3,2 ns16550a g  uart@3,3 ns16550a g  usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs 2dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4l disabledregulator-abb-mpu ti,abb-v1 xabb_mpu_iva+H0rH0hbase-addressint-address%`5sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+8pinmux_mmc3_2_pins(U8DFHBiisp@480bc000 ti,omap3-ispH H AqHports+bandgap@48002524H%$ti,omap36xx-bandgapTitarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8syscj wfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8syscj wfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermalN regulator-vddvarioregulator-fixed xvddvarioiregulator-vdd33aregulator-fixedxvdd33aimemory@80000000{memory wl12xx_vmmc"default0regulator-fixedxvwl1271w@w@ pi compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesstatusreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressreg-shiftcurrent-speedgpmc,mux-add-datagpmc,wait-pinmultipointnum-epsram-bitsinterface-typeusb-phypowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorsregulator-always-ongpiostartup-delay-usenable-active-high