#8( Hgoogle,veyron-speedy-rev9google,veyron-speedy-rev8google,veyron-speedy-rev7google,veyron-speedy-rev6google,veyron-speedy-rev5google,veyron-speedy-rev4google,veyron-speedy-rev3google,veyron-speedy-rev2google,veyron-speedygoogle,veyronrockchip,rk3288&7Google Speedyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 -@;B Ncpu@501cpuarm,cortex-a12 -@;Ncpu@502cpuarm,cortex-a12 -@;Ncpu@503cpuarm,cortex-a12 -@;Ncpu-opp-tableoperating-points-v2VNopp-126000000ah opp-216000000a h opp-408000000aQh opp-600000000a#Fh opp-696000000a)|h~opp-816000000a0,hB@opp-1008000000a<hopp-1200000000aGhopp-1416000000aTfrhOopp-1512000000aZJhopp-1608000000a_"h opp-1704000000aehpopp-1800000000akIh\amba simple-busvdma-controller@ff250000arm,pl330arm,primecell%@}; apb_pclkNdma-controller@ff600000arm,pl330arm,primecell`@}; apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@}; apb_pclkN`reserved-memoryvdma-unusable@fe000000oscillator fixed-clockn6xin24mN timerarm,armv7-timer0   n6 timer@ff810000rockchip,rk3288-timer  H ;a  pclktimerdisplay-subsystemrockchip,display-subsystem! dwmmc@ff0c0000rockchip,rk3288-dw-mshc'р ;Drvbiuciuciu-driveciu-sample5  @@resetokayLVhy  Z defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshc'р ;Eswbiuciuciu-driveciu-sample5 ! @@resetokayLh#0FQ default dwmmc@ff0e0000rockchip,rk3288-dw-mshc'р ;Ftxbiuciuciu-driveciu-sample5 "@@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc'р ;Guybiuciuciu-driveciu-sample5 #@@resetokayLV_FQ default saradc@ff100000rockchip,saradc $n;I[saradcapb_pclkW @saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi;ARspiclkapb_pclk  txrx , default !"#okayec@0google,cros-ec-spi&  default$-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @6};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi;BSspiclkapb_pclk txrx - default%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi;CTspiclkapb_pclktxrx . default)*+,okayC flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c;M default-okayV2ndtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c;O default. disabledi2c@ff160000rockchip,rk3288-i2c @i2c;P default/okayV2n,ts3a227e@3b ti,ts3a227e;&0 default1Ntrackpad@15elan,ekth3000&  default23i2c@ff170000rockchip,rk3288-i2c Ai2c;Q default4okayV,nNwserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7;MUbaudclkapb_pclk default 567okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8;NVbaudclkapb_pclk default8okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9;OWbaudclkapb_pclk default9okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :;PXbaudclkapb_pclk default: disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;;QYbaudclkapb_pclk default; disabledthermal-zonesreserve_thermal!<cpu_thermald!<tripscpu_alert01=passiveN=cpu_alert11p=passiveN>cpu_crit1_= criticalcooling-mapsmap0H= Mmap1H> Mgpu_thermald!<tripsgpu_alert01p=passiveN?gpu_crit1_= criticalcooling-mapsmap0H? Mtsadc@ff280000rockchip,rk3288-tsadc( %;HZtsadcapb_pclk @tsadc-apb initdefaultsleep@\Af@psokayN<ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqB8;fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB @stmmaceth disabledusb@ff500000 generic-ehciP ;usbhostCusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ;otghostD usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ;otghost+:@@ E usb2-phyokayzIEusb@ff5c0000 generic-ehci\ ;usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c;L defaultFokayV2ndpmic@1brockchip,rk808xin32kwifibt_32kin&0 defaultG`H3HHNregulatorsDCDC_REG1vdd_arm$8J qb zqN regulator-state-memDCDC_REG2vdd_gpu$8J 5bzqN{regulator-state-memB@DCDC_REG3 vcc135_ddr$8regulator-state-memDCDC_REG4vcc_18$8Jw@bw@Nregulator-state-memw@LDO_REG1 vcc33_io$8J2Zb2ZN3regulator-state-mem2ZLDO_REG3vdd_10$8JB@bB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h$8J&%b&%regulator-state-memSWITCH_REG1 vcc33_lcd$8N^regulator-state-memLDO_REG6 vcc18_codec$8Jw@bw@N_regulator-state-memLDO_REG4 vccio_sdJw@b2ZNregulator-state-memLDO_REG5 vcc33_sdJ2Zb2ZNregulator-state-memLDO_REG8 vcc33_ccd$8J2Zb2Zregulator-state-mem2Zi2c@ff660000rockchip,rk3288-i2cf =i2c;N defaultIokayV2n max98090@10maxim,max98090&Jmclk;q defaultKNpwm@ff680000rockchip,rk3288-pwmh defaultL;^pwmokayNpwm@ff680010rockchip,rk3288-pwmh defaultM;^pwmokaypwm@ff680020rockchip,rk3288-pwmh  defaultN;^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0 defaultO;^pwm disabledbus_intmem@ff700000 mmio-srampvpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsNpower-controller!rockchip,rk3288-power-controllerhI Ncpower-domain@9 ;chgfdehilkj$PQRSTUVWXpower-domain@11 ;opYZpower-domain@12 ;[power-domain@13 ;\]reboot-modesyscon-reboot-mode RBRB#RB 3RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvB?Hjk$#gׄeрxhрxhNsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwNBedp-phyrockchip,rk3288-dp-phy;h24mLokayNsio-domains"rockchip,rk3288-io-voltage-domainokayW3alz33^_usbphyrockchip,rk3288-usb-phyokayusb-phy@320L ;]phyclkNEusb-phy@334L4;^phyclkNCusb-phy@348LH;_phyclkNDwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt;p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk;T`tx 6 defaultaB disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5``txrxi2s_hclki2s_clk;R defaultbokayNcrypto@ff8a0000rockchip,rk3288-crypto@ 0 ;}aclkhclksclkapb_pclk @crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu; aclkiface  disablediommu@ff914000rockchip,iommu @P isp_mmu; aclkiface   disabledrga@ff920000rockchip,rk3288-rga ;jaclkhclksclk 9c ilm @coreaxiahbvop@ff930000rockchip,rk3288-vop ;aclk_vopdclk_vophclk_vop 9c def @axiahbdclk GdokayportN endpoint@0 NeNxendpoint@1 NfNtendpoint@2 NgNnendpoint@3 NhNqiommu@ff930300rockchip,iommu  vopb_mmu; aclkiface 9c  okayNdvop@ff940000rockchip,rk3288-vop ;aclk_vopdclk_vophclk_vop 9c  @axiahbdclk GiokayportN endpoint@0 NjNyendpoint@1 NkNuendpoint@2 NlNoendpoint@3 NmNriommu@ff940300rockchip,iommu  vopl_mmu; aclkiface 9c  okayNimipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ ;~d refpclk 9c B disabledportsportendpoint@0 NnNgendpoint@1 NoNllvds@ff96c000rockchip,rk3288-lvds@;g pclk_lvds lcdcp 9c B disabledportsport@0endpoint@0 NqNhendpoint@1 NrNmdp@ff970000rockchip,rk3288-dp@ b;icdppclksdpo@dpBokay ^portsport@0endpoint@0 NtNfendpoint@1 NuNkport@1endpoint@0 NvNhdmi@ff980000rockchip,rk3288-dw-hdmiB g;hmniahbisfrcec 9c okay hwportsportendpoint@0 NxNeendpoint@1 NyNjiommu@ff9a0800rockchip,iommu vpu_mmu; aclkiface  disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu; aclkiface  disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu; z 9c okay t{gpu-opp-tableoperating-points-v2Nzopp-100000000ah~opp-200000000a h~opp-300000000ahB@opp-400000000aׄhopp-500000000aehOopp-600000000a#Fhqos@ffaa0000syscon N\qos@ffaa0080syscon N]qos@ffad0000syscon NQqos@ffad0100syscon NRqos@ffad0180syscon NSqos@ffad0400syscon NTqos@ffad0480syscon NUqos@ffad0500syscon NPqos@ffad0800syscon NVqos@ffad0880syscon NWqos@ffad0900syscon NXqos@ffae0000syscon N[qos@ffaf0000syscon NYqos@ffaf0080syscon NZinterrupt-controller@ffc01000 arm,gic-400  @ @ `   Nefuse@ffb40000rockchip,rk3288-efuse ;q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlBv defaultsleep|}\|~gpio0@ff750000rockchip,gpio-banku Q;@    N0gpio1@ff780000rockchip,gpio-bankx R;A    gpio2@ff790000rockchip,gpio-banky S;B    Ngpio3@ff7a0000rockchip,gpio-bankz T;C    gpio4@ff7b0000rockchip,gpio-bank{ U;D    Ngpio5@ff7c0000rockchip,gpio-bank| V;E    Ngpio6@ff7d0000rockchip,gpio-bank} W;F    NJgpio7@ff7e0000rockchip,gpio-bank~ X;G    N gpio8@ff7f0000rockchip,gpio-bank Y;H    hdmihdmi-cec-c0 hdmi-cec-c7 hdmi-ddc vcc50-hdmi-en Npcfg-pull-up Npcfg-pull-down Npcfg-pull-none Npcfg-pull-none-12ma  Nsuspendglobal-pwroff N|ddrio-pwroff ddr0-retention ddr1-retention suspend-l-wake N}suspend-l-sleep N~edpedp-hpd  i2c0i2c0-xfer NFi2c1i2c1-xfer N-i2c2i2c2-xfer   NIi2c3i2c3-xfer N.i2c4i2c4-xfer N/i2c5i2c5-xfer N4i2s0i2s0-bus` Nblcdclcdc-ctl@ Npsdmmcsdmmc-clk Nsdmmc-cmd Nsdmmc-cd sdmmc-bus1 sdmmc-bus4@ Nsdmmc-cd-disabled Nsdmmc-cd-gpio Nsdio0sdio0-bus1 sdio0-bus4@ Nsdio0-cmd Nsdio0-clk Nsdio0-cd sdio0-wp sdio0-pwr sdio0-bkpwr sdio0-int wifienable-h Nbt-enable-l Nsdio1sdio1-bus1 sdio1-bus4@ sdio1-cd sdio1-wp sdio1-bkpwr sdio1-int sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk Nemmc-cmd Nemmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 Nemmc-reset  Nspi0spi0-clk  N spi0-cs0  N#spi0-tx N!spi0-rx N"spi0-cs1 spi1spi1-clk  N%spi1-cs0  N(spi1-rx N'spi1-tx N&spi2spi2-cs1 spi2-clk N)spi2-cs0 N,spi2-rx N+spi2-tx  N*uart0uart0-xfer N5uart0-cts N6uart0-rts N7uart1uart1-xfer  N8uart1-cts  uart1-rts  uart2uart2-xfer N9uart3uart3-xfer N:uart3-cts  uart3-rts  uart4uart4-xfer N;uart4-cts  uart4-rts  tsadcotp-gpio N@otp-out NApwm0pwm0-pin NLpwm1pwm1-pin NMpwm2pwm2-pin NNpwm3pwm3-pin NOgmacrgmii-pins  rmii-pins spdifspdif-tx  Napcfg-pull-none-drv-8ma  Npcfg-pull-up-drv-8ma  pcfg-output-high Npcfg-output-low Nbuttonspwr-key-l Nap-lid-int-l Npmicpmic-int-l NGdvs-1  dvs-2 rebootap-warm-reset-h Nrecovery-switchrec-mode-l tpmtpm-int-h write-protectfw-wp-ap codechp-det Nint-codec NKmic-det  Nheadsetts3a227e-int-l N1backlightbl-en Nbl_pwr_en  Nchargerac-present-ap Ncros-ecec-int N$trackpadtrackpad-int N2usb-hosthost1-pwr-en Nusbotg-pwren-h Nbuck-5vdrv-5v Nlcdlcd-en Navdd-1v8-disp-en  Nmemorymemorygpio-keys gpio-keys defaultpower Power 0 %t 0dlid Lid 0 % B 0gpio-restart gpio-restart 0  default Semmc-pwrseqmmc-pwrseq-emmc default \ Nsdio-pwrseqmmc-pwrseq-simple; ext_clock default \Nvcc-5vregulator-fixedvcc_5v$8JLK@bLK@ h s  defaultNHvcc33-sysregulator-fixed vcc33_sys$8J2Zb2Z hNvcc50-hdmiregulator-fixed vcc50_hdmi$8 hH s  defaultsound!rockchip,rockchip-audio-max98090 default VEYRON-I2S   J J  backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~  6  default CB@ H  ]  nNgpio-charger gpio-charger {mains 0 defaultpanelinnolux,n116bgesimple-panelokay n portsportendpoint NNvvccsysregulator-fixedvccsys8$Nvcc5-host1-regulatorregulator-fixed s 0  default vcc5_host1$8vcc5v-otg-regulatorregulator-fixed s 0  default vcc5_host2$8panel-regulatorregulator-fixed s  defaultpanel_regulator  hNvcc18-lcdregulator-fixed s  default vcc18_lcd$8 hbacklight-regulatorregulator-fixed s  defaultbacklight_regulator h :N #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiospwmspost-pwm-on-delay-mspwm-off-delay-mspower-supplycharger-typebacklightstartup-delay-us